1. Field of the Invention
The present invention relates to digital-to-analog (D/A) converters and in particular, to an accurate D/A conversion using a charge divide-by-four circuit.
2. Discussion of the Related Art
Conventional algorithm-based digital-to-analog converters (DACs) sample bits of a digital word and convert them to an analog quantity, such as a voltage. In some DACs, a quantity of charge corresponding to the value of the digital word is stored and a converted analog quantity representing the amount of charge, such as a voltage, is measured at an output. For example, conventional switched-capacitor DACs convert incoming bits to corresponding voltages and then utilize switches to control the charging and discharging of various capacitors in response to the incoming bits in order to accumulate charge on the capacitors representing the value of the digital word. The charge or a resulting voltage can then be measured to obtain the converted analog quantity. However, the accuracy of the conversion depends on how well the capacitors are matched. Ideally, they should be of the same capacitance, and any deviations or mismatch in capacitance can result in conversion errors.
Czarniak et al. disclose a DAC in U.S. Pat. No. 4,746,903 entitled "Parallel Algorithmic Digital to Analog Converter", which utilizes a divide-by-4 circuit to greatly reduce the effects of capacitor mismatch. However, Czarniak et al.'s DAC, which is shown as DAC 100 in FIG. 1, requires three operational amplifiers (op amps), five capacitors and nineteen switches. DAC 100 includes subcircuits 10 and 30 for voltage addition, multiplication by 2, and divide by 4 and subcircuit 50 for tracking an analog signal from subcircuit 10 and holding the instantaneous value of that signal while subcircuit 10 proceeds with further processing. Subcircuit 10 has one op amp 11, two capacitors 12 and 13, and eight switches 14-21. Similarly, subcircuit 30 has one op amp 31, two capacitors 32 and 33, and eight switches 34-41, while subcircuit 50 has one op amp 51, one capacitor 52, and three switches 53-55. The nineteen switches are switched on and off, as described in Czarniak et al., to achieve desired multiplication, division, and addition operations for providing an accurate analog conversion of a digital signal.
Accordingly, it is desirable to provide a smaller and less complicated DAC where capacitor mismatching has a greatly reduced effect on the conversion accuracy.